Low-Power SAR ADCs:Basic Techniques and Trends

With the advent of small, battery-powered devices, power efficiency has become of paramount importance. For analog-to-digital converters (ADCs), the successive approximation register (SAR) architecture plays a prominent role thanks to its ability to combine power efficiency with a simple architecture, a broad application scope, and technology portability. In this review article, the basic design challenges for low-power SAR ADCs are summarized and several design techniques are illustrated. Furthermore, the limitations of SAR ADCs are outlined and hybrid architecture trends, such as noise-shaping SAR ADCs and pipelined SAR ADCs, are briefly introduced and clarified with examples

Noise-Shaping SAR ADCs: From Discrete Time to Continuous Time

Noise-shaping (NS) SAR ADCs become popular recently, thanks to their low-power and high-resolution features. This article first summarizes and benchmarks different discrete-time (DT) NS-SAR implementations in literature. An open-loop duty-cycled residue amplifier is selected as a power-efficient solution to realize high residue gain. Then, a digital-predicted mismatch error shaping technique is introduced to improve the DAC linearity. The proposed DT NS-SAR ADC achieves 80 dB SNDR and 98 dB SFDR in a 31.25 kHz bandwidth while consuming 7.3 μW. Next, the NS-SAR architecture is extended from DT operation to continuous-time (CT) operation. The ADC sampling switch is removed, and the loop filter is duty cycled to realize the CT NS-SAR operation. Compared to DT designs, the CT NS-SAR ADC is easy to drive and has an inherent anti-aliasing function. As a proof of concept, the proposed CT NS-SAR ADC achieves 77 dB SNDR and 86 dB SFDR in a 62.5 kHz bandwidth with a power consumption of 13.5 μW

System and Method for Analog-to-Digital Signal Conversion

Example embodiments relate to systems and methods for analog-to-digital signal conversion. One embodiment includes a system for analog-to-digital signal conversion. The system includes an analog input signal. The system also includes a digital-to-analog converter configured to generate a reference signal. Further, the system includes an amplifier configured to amplify an error signal that includes a difference between the analog input signal and the reference signal. Additionally, the system includes a level-crossing based sampling circuit that includes a first comparator configured to compare the error signal with respect to a first reference level, and a second comparator configured to compare the error signal with respect to a second reference level, thereby generating event-based reset signals corresponding to a plurality of sampling instances in order to reset the digital-to-analog converter. Yet further, the system includes a trigger circuit configured to generate reset signals asynchronous to the event-based reset signals

A 1.25 µJ per Measurement Ultrasound Rangefinder System in 65nm CMOS for Explorations With a Swarm of Sensor Nodes

This paper presents an ultrasound rangefinder system able to find relative distances among energy-constrained sensor nodes. The nodes build a swarm that is operated in collision and multipath rich environments. A new distance measurement technique combining Wake-up and Frequency Modulated Continuous Wave (FMCW) is proposed to enable the ranging while neglecting the echoes from passive reflectors in the environment. The building blocks of the sensor nodes comprise a transmitter, a wake-up receiver, and a ranging receiver, all implemented in a 65 nm CMOS technology. The transmitter includes two switched-capacitor converters and an output multiplexer to generate a four-level driving signal and broadcast either a wake-up sequence or a digitally synthesized ultrasound Chirp. The transmitter dissipates 0.43μ J and 0.82μ J to broadcast the wake-up signal and the Chirp, respectively. A mixer first architecture is exploited in the wake-up receiver to reduce the always-on power consumption of the nodes. The ranging receiver uses a heterodyne architecture suited for the FMCW. The power consumption of the wake-up receiver and ranging receiver is 23.6 nW and 0.56μ W, respectively. The proposed rangefinder is experimentally characterized up to a 1 m distance in air and dissipates 1.25μ J per measurement, achieving a resolution of 18.7 mm at 0.55 m

A -81.6dBm sensitivity ultrasound transceiver in 65nm CMOS for symmetrical data-links

This paper presents the design and experimental characterization of an ultrasound transceiver. The transceiver includes an on-chip transmitter and a receiver to be used in a symmetric data-link, where each sensor node has limited energy resources and is operated in air or a fluidic environment. The receiver and the transmitter operate from a 0.8V supply and consume 1.18μW and 50μW, respectively, while exchanging data at 1kbps data-rate. The receiver sensitivity is -81.6dBm at a 10-3 Bit Error Rate (BER) level, which enables an experimentally verified transmission over 3.2m in air and a predicted transmission distance in water in the order of 2km, with a measured energy per bit performance of 51.18 nJ/b

A 2.67 µJ per Measurement FMCW Ultrasound Rangefinder System for the Exploration of Enclosed Environments

This letter presents the design and experimental characterization of an ultrasound rangefinder system. A new distance measurement method is proposed for determining the relative position among sensor nodes that are operated in a collision and multipath rich environment, while needing no common time reference between them. A 65 nm CMOS technology has been used to build the sensor nodes, which comprise an on-chip receiver and transmitter. The proposed rangefinder system is characterized up to 1 m in air and has a range resolution of 6.5 mm, while dissipating 2.67~\mu {\mathrm{ J}} per measurement

Design of a low-power ultrasound transceiver for underwater Sensor networks

This paper presents an ultrasound (US) transceiver including a transmitter and a receiver for underwater wireless sensor nodes, where low-power operation is desired to extend the life-time of the network. A system-level analysis of the underwater communication has been performed by taking into account the underwater propagation and the medium charac-teristics to show their impact on the overall performance. In addition, a low-noise amplffier using an inverter-based topology has been introduced to ensure power efficiency of the receiver, where a bulk-feedback method is proposed to stabilize the output bias point of the inverter. Simulation results show that the proposed transceiver has a scalable power consumption from 1.95μ W to 10.4μ W while achieving 100μ V to 20μ V sensitivity at a 10-3 BER level

Flexible and self-adaptive sense-and-compress for sub-microWatt always-on sensory recording

Miniaturized sensory systems for IoT applications experience a severe power burden from their wireless link and/or embedded storage system. Compressive sensing techniques target data compression before storage and transmission to save power, while minimizing information loss. This work proposes a self-adaptive sense-and-compress system, which consumes only 45-884n W while continuously recording and compressing signals with a bandwidth up to 5kHz. The flexible system uses a combination of off-line Evolutionary Algorithms, and on-line self-adaptivity to constantly adapt to the incoming sensory data statistics, and the current application quality requirements. The 0.27mm2 sense-and-compress interface is integrated in a 65nm CMOS technology, together with an on-board temperature sensor, or can interface with any external sensor. The scalable, self-adaptive system is moreover heavily optimized for low-power and low-leakage, resulting in a tiny, efficient, yet flexible interface allowing always-on sensory monitoring, while consuming 2.5X less power compared to the current State-of-the-Art

Motion-artifact reduction in capacitive heart-rate measurements by adaptive filtering

Electrocardiography (ECG) measurements are essential components in clinical diagnosis and monitoring. Conventional ECG measurements produce discomfort to the patients due to the use of gel and direct skin contact. Capacitive electrodes can measure ECG signals through an isolation layer; they are especially suitable for long-term ambulatory monitoring. However, capacitive ECG measurements are severely affected by motion artifacts (MAs) due to variable coupling distance. Adaptive filtering has been widely used for MA reduction in ECG measurements. Unfortunately, a reference signal recorded by additional sensors is required for the existing adaptive-filtering methods, limiting their applicability in ambulatory settings. In this paper on capacitive ECG recordings, a novel adaptive-filtering method is proposed for MA removal, where the reference signal is extracted from the power-line interference (PLI). PLI is particularly evident in a capacitive ECG due to unbalanced coupling capacitance. Along with MAs, electrode movement causes variations in the PLI amplitude. By demodulating the PLI, a reference signal reflecting variations in the coupling capacitance can be extracted for adaptive MA removal. The proposed method was evaluated both by simulations and real data and compared with the acceleration-based adaptive-filtering method. Comparable or higher ECG signal-to-noise ratio was achieved by the proposed method with a computational cost of 79 μs/iteration, indicating effective MA removal. The proposed method may, therefore, lead to improved analysis of capacitive ECG signals in ambulatory settings